Question 1

A(n)_________ is generated by a failure such as power failure or memory parity error.
A)I / O interrupt
B)hardware failure interrupt
C)timer interrupt
D)program interrupt

Accepted Answer

A hardware failure interrupt is generated by a failure in the hardware, such as a power failure or memory parity error. The other options, such as I/O interrupt, timer interrupt, and program interrupt, are not necessarily related to hardware failures.

Question 2

The von Neumann architecture is based on which concept?
A)data and instructions are stored in a single read-write memory
B)the contents of this memory are addressable by location
C)execution occurs in a sequential fashion
D)all of the above

Accepted Answer

The von Neumann architecture is based on all three concepts - data and instructions are stored in a single read-write memory, the contents of this memory are addressable by location, and execution occurs in a sequential fashion.

Question 3

A sequence of codes or instructions is called __________.
A)software
B)memory
C)an interconnect
D)a register

Accepted Answer

A sequence of codes or instructions is typically referred to as software. Memory is a physical component that stores data and instructions for the computer to access. An interconnect refers to the communication pathways within a computer system. A register is a small component within the CPU that stores data temporarily as the CPU processes it. Therefore, the best choice for this question is A.

Question 4

A key characteristic of a bus is that it is not a shared transmission medium.

Accepted Answer

A bus is a shared transmission medium where multiple devices share the same communication line. Each device can receive all transmissions, but must be configured to accept transmissions addressed to it specifically.

Question 5

Program execution consists of repeating the process of instruction fetch and instruction execution.

Accepted Answer

Program execution involves fetching instructions from memory and executing them repeatedly until the program completes or is terminated. This process of fetching and executing instructions is known as the fetch-execute cycle, which is the fundamental operation of a computer's central processing unit (CPU).

Question 6

The method of using the same lines for multiple purposes is known as time multiplexing.

Accepted Answer

Time multiplexing is a technique used to share a single communication channel or line for transmitting multiple signals or data streams by dividing the time. This technique is used in various applications such as telecommunications, computer networking, and digital signal processing.

Question 7

Computer systems contain a number of different buses that provide pathways between components at various levels of the computer system hierarchy.

Accepted Answer

This statement is true. Buses provide pathways for communication between various components within a computer system, such as the CPU, memory, input/output devices, and peripheral devices. These buses can operate at different speeds, have different capacities, and use different protocols. Examples of buses in a computer system include the front-side bus (FSB), memory bus, expansion bus (such as PCI or AGP), and system bus.

Question 8

Interrupts do not improve processing efficiency.

Accepted Answer

Interrupts allow for more efficient processing by allowing the processor to prioritize and respond to external events, allowing for multitasking and improved system performance.

Question 9

Timing refers to the way in which events are coordinated on the bus.

Accepted Answer

Timing is indeed concerned with how events are coordinated on the bus, including when signals are sent and received, how long they remain on the bus, and how conflicts between different signals are resolved. Proper timing is crucial to ensure that data is transmitted accurately and efficiently.

Question 10

Because all devices on a synchronous bus are tied to a fixed clock rate,the system cannot take advantage of advances in device performance.

Accepted Answer

Since all devices on a synchronous bus are tied to a fixed clock rate, if some of the devices become faster or more capable, the entire system cannot take full advantage of their capabilities. Therefore, the statement is true.

Question 11

It is not possible to connect I / O controllers directly onto the system bus.

Accepted Answer

I/O controllers are typically connected to the system bus through input/output ports (I/O ports) or by a separate I/O bus.

Question 12

The basic function of a computer is to execute programs.

Accepted Answer

The primary purpose of a computer is to run software or programs to perform various tasks and functions.

Question 13

An I / O module cannot exchange data directly with the processor.

Accepted Answer

An I/O module can exchange data directly with the processor through input/output instructions.

Question 14

The unit of transfer at the link layer is a phit and the unit transfer at the physical layer is a flit.

Accepted Answer

The unit of transfer at the link layer is usually a frame, while at the physical layer, it's usually a bit or a symbol. Flit (FLow control unIT) is a term sometimes used in networking to refer to a unit of data at the transport layer of the network stack, not the physical layer.

Question 15

In general,the more devices attached to the bus,the greater the bus length and hence the greater the propagation delay.

Accepted Answer

This statement is true. The more devices that are attached to a bus, the longer the bus length becomes, which in turn increases the propagation delay. This delay refers to the time it takes for a signal to travel from one end of the bus to the other. As more devices are added, the signal has to travel further, and it takes longer for all devices to receive the signal.

Question 16

With asynchronous timing the occurrence of events on the bus is determined by a clock.

Accepted Answer

Asynchronous timing refers to a communication method where data is transmitted without a clock signal. In this method, the timing of the data transmission is not determined by a clock, but rather by the arrival of each data bit.

Question 17

At a top level,a computer consists of CPU,memory,and I / O components.

Accepted Answer

The CPU (Central Processing Unit), memory (RAM), and I/O (Input/Output) components are the three essential components of a computer.

Question 18

The processing required for a single instruction is called a(n)__________ cycle.
A)execute
B)fetch
C)instruction
D)packet

Accepted Answer

The processing required for a single instruction is called an instruction cycle. This cycle typically involves fetching the instruction from memory, decoding it, executing it, and then storing the result.

Question 19

Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies,Princeton.
A)John Maulchy
B)John von Neumann
C)Herman Hollerith
D)John Eckert

Accepted Answer

John von Neumann developed the concept of stored program computers, which are the basis for virtually all contemporary computer designs. He worked at the Institute for Advanced Studies, Princeton and made significant contributions to several fields, including mathematics, physics, and economics. Although the other options (John Maulchy, Herman Hollerith, and John Eckert) were also important figures in the history of computing, they did not have as significant an impact on contemporary computer designs as von Neumann.

Question 20

A key requirement for PCIe is high capacity to support the needs of higher data rate I / O devices such as Gigabit Ethernet.

Accepted Answer

PCIe was designed to support higher bandwidth demands of modern I/O devices, including Gigabit Ethernet. Therefore, the statement is true.

Quiz 3: A Top-Level View of Computer Function and Interconnection

A(n) _________ is generated by a failure such as power failure or memory parity error.

The von Neumann architecture is based on which concept?

A sequence of codes or instructions is called __________.