Question 1

-Which circuit in Figure 5- 3 represents the NAND implementation of an inverter?
A) Figure (A).
B) Figure (B).
C) Figure (C).
D) Figure (D).

Accepted Answer

The answer of 
-Which circuit in Figure 5- 3 represents...

Question 2

The relationship between a NAND gate and a negative- OR gate is expressed by__________.
A) 
B) 
C) 
D)

Accepted Answer

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Question 3

Which circuit is the logical equivalent of the Reference Circuit?

A) Figure (A)
B) Figure (B)
C) Figure (C)
D) Figure (D)

Accepted Answer

The answer of Which circuit is the logical equivalent of...

Question 4

When the inverted output of one gate is connected to the inverted input of another gate, __________.
A) one inversion cancels the other and only a single inversion results
B) the inversions cancel
C) a double inversion occurs and the signal is inverted
D) all of the above are correct

Accepted Answer

The answer of When the inverted output of one gate...

Question 5

Why are multiple NAND gates often used in place of other single function gates?
A) It is easier to design logic circuits with a single gate type, since you only have to fully understand how one type of gate works.
B) It makes it possible to use spare portions of NAND IC packages to implement other logic functions, perhaps reducing the total IC package count.
C) NAND gates are cheaper than any other type of gate.
D) NAND gates are packaged more densely on IC's than other types of gates.

Accepted Answer

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Question 6

Which of the figures is the correct NAND logic implementation of the expression,  
A) Figure (A)
B) Figure (B)
C) Figure (C)
D) Figure (D)

Accepted Answer

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Question 7

The relationship between a NOR gate and a negative- AND gate is expressed by 	.
A) 
B) 
C) 
D)

Accepted Answer

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Question 8

-Which circuit in Figure 5- 4 represents the NOR implementation of an OR gate?
A) Figure (A)
B) Figure (B)
C) Figure (C)
D) Figure (D)

Accepted Answer

The answer of 
-Which circuit in Figure 5- 4 represents...

Question 9

-Which circuit in Figure 5- 4 represents the NOR implementation of an AND gate?
A) Figure (A)
B) Figure (B)
C) Figure (C)
D) Figure (D)

Accepted Answer

The answer of 
-Which circuit in Figure 5- 4 represents...

Question 10

-Which circuit in Figure 5- 4 represents the NOR implementation of an inverter?
A) Figure (A)
B) Figure (B)
C) Figure (C)
D) Figure (D)

Accepted Answer

A NOR gate with both inputs connected together functions as an inverter, which is represented in Figure (C).

Question 11

Which output waveform is correct for the circuit input waveforms shown?

A) Output (A)
B) Output (B)
C) Output (C)
D) Output (D)

Accepted Answer

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Question 12

The point identified as 'X' in this figure is referred to as _______.

A) a reference point
B) a node
C) common
D) a tie point

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Question 13

What is the indication of an open in the output of a driving gate?
A) Only the output of the defective gate is affected.
B) The affected node will be stuck in the HIGH state.
C) There is a signal loss to all load gates.
D) The affected node will be stuck in the LOW state.

Accepted Answer

An open in the output of a driving gate results in a signal loss to all load gates connected to that output, as the electrical path is interrupted.

Question 14

What is the indication of a short to ground in the output of a driving gate?
A) The affected node will be stuck in the HIGH state.
B) The node is stuck in the LOW state.
C) Only the output of the defective gate is affected.
D) There is a signal loss to all load gates.

Accepted Answer

A short to ground in the output of a driving gate causes the affected node to be stuck in the LOW state because the output is directly connected to ground, overriding any attempt by the gate to drive the node high.

Question 15

-Based on the indications of probe A in Figure 5- 5, what, if anything, is wrong with the circuit?
A) The logic probe is unable to determine the state of the circuit at that point and is blinking to alert the technician to the problem.
B) The output appears to be LOW, but is being pulsed by the pulser.
C) The output appears to be shorted to Vcc, but is being pulsed by the pulser.
D) Nothing appears to be wrong at that point.

Accepted Answer

The answer of 
-Based on the indications of probe A...

Question 16

-Based on the indications of probe C in Figure 5- 5, what, if anything, is wrong with the circuit?
A) The gate appears to be working correctly.
B) Pin 6 on the right- hand IC is shorted to ground.
C) The gate being tested has not been connected to Vcc and ground.
D) Pin 5 on the right- hand IC appears to be open.

Accepted Answer

Pin 6 on the right-hand IC being shorted to ground would cause the circuit to malfunction, as indicated by probe C.

Question 17

The output of a gate has an internal short. A current tracer will ________.
A) be able to identify the defective load node
B) probably not be able to locate the problem
C) identify the defective gate
D) show whether the gate is shorted to Vcc or ground

Accepted Answer

A current tracer is typically used to trace current paths and may not be effective in pinpointing internal shorts within a gate.

Question 18

An output gate is connected to four input gates; the circuit does not function. Preliminary tests with a DMM indicate that power is applied; scope tests show that the primary input gate has a pulsing signal, while the interconnecting node has no signal. The four load gates are all on different IC's. Which instrument will best help isolate the problem?
A) Oscilloscope
B) Logic analyzer
C) Current tracer
D) Logic probe

Accepted Answer

A current tracer is best for isolating the problem as it can help identify where the current is not flowing correctly, indicating a possible open circuit or fault in the connections between the gates.

Quiz 5: Combinational Logic Analysis

-Which circuit in Figure 5- 3 represents the NAND implementation of an inverter?

The relationship between a NAND gate and a negative- OR gate is expressed by__________.

Which circuit is the logical equivalent of the Reference Circuit?

When the inverted output of one gate is connected to the inverted input of another gate, __________.

Why are multiple NAND gates often used in place of other single function gates?

Which of the figures is the correct NAND logic implementation of the expression,

The relationship between a NOR gate and a negative- AND gate is expressed by .

-Which circuit in Figure 5- 4 represents the NOR implementation of an OR gate?

-Which circuit in Figure 5- 4 represents the NOR implementation of an AND gate?

-Which circuit in Figure 5- 4 represents the NOR implementation of an inverter?

Which output waveform is correct for the circuit input waveforms shown?

The point identified as 'X' in this figure is referred to as _______.

What is the indication of an open in the output of a driving gate?

What is the indication of a short to ground in the output of a driving gate?

-Based on the indications of probe A in Figure 5- 5, what, if anything, is wrong with the circuit?

-Based on the indications of probe C in Figure 5- 5, what, if anything, is wrong with the circuit?

The output of a gate has an internal short. A current tracer will ________.