For a NAND gate, struck-at 1 fault in second input line cannot be detected if
A) q is 1
B) q is 0
C) q changes from 1 to 0
D) q changes from 0 to 1
Correct Answer:
Verified
Q8: Which contributes to the necessary delay element?
A)flip-flops
B)circuit
Q9: In an OR gate, if A and
Q10: Iterative test generation method suits for circuits
Q11: Which method is very time consuming?
A)d-algorithm
B)iterative test
Q12: In this iterative test generation method, sequential
Q14: Any condition that causes a processor to
Q15: In this technique, a simple fault manifests
Q16: The contention for the usage of a
Q17: The situation wherein the data of operands
Q18: The stalling of the processor due to
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