Which of the following methods would be used to disable the PRESET (PRE) and CLEAR (CLR) inputs to a clocked flip- flop in a circuit application where they are NOT used?
A) Connect the 
and 
inputs to a HIGH logic level.
B) Connect the 11eea47d_ed02_e0d8_97f4_99d868dc8948_TB9839_11 and 11eea47e_0c84_858a_97f4_4f055cde406c_TB9839_11 inputs to a LOW logic level.
C) Connect the 11eea47d_ed02_e0d8_97f4_99d868dc8948_TB9839_11 input to a HIGH logic level and the 11eea47e_0c84_858a_97f4_4f055cde406c_TB9839_11to a LOW logic level.
D) Connect the 11eea47d_ed02_e0d8_97f4_99d868dc8948_TB9839_11input to a LOW logic level and the 11eea47e_0c84_858a_97f4_4f055cde406c_TB9839_11 input to a HIGH logic level.
Correct Answer:
Verified
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