What is meant by parallel load of a shift register?
A) all ffs are preset with data
B) each ff is loaded with data, one at a time
C) parallel shifting of data
D) all ffs are set with data
Correct Answer:
Verified
Q7: A modulus-10 counter must have _
A)10 flip-flops
B)4
Q8: Which is not an example of a
Q9: The designation means that the
A)up count
Q10: The full form of SIPO is
A)serial-in
Q11: How can parallel data be taken out
Q13: After three clock pulses, the register contains
Q14: What will be the 4-bit pattern after
Q15: In digital logic, a counter is a
Q16: A counter circuit is usually constructed of
Q17: How many types of the counter are
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