The BUS that allows I/O, memory and Processor to coexist is _________
A) Attributed BUS
B) Processor BUS
C) Backplane BUS
D) External BUS
Correct Answer:
Verified
Q15: The addressing mode, where you directly specify
Q16: Which of the following register is used
Q17: If a processor does not have any
Q18: The Sun micro systems processors usually follow
Q19: Which of the architecture is power efficient?
A)CISC
B)RISC
C)ISA
D)IANA
Q20: The master indicates that the address is
Q21: In IBM's S360/370 systems lines are used
Q22: The transmission on the asynchronous BUS is
Q24: The chip can be disabled or cut
Q25: The less space consideration as lead to
Unlock this Answer For Free Now!
View this answer and more for free by performing one of the following actions
Scan the QR code to install the App and get 2 free unlocks
Unlock quizzes for free by uploading documents