Deck 3: The Central Processing Unit CPU

Question 1

You have heard that the Linux distribution your are going to install to run a new application runs best on a RISC architecture. Which of the following CPU families should you consider for the computer on which you will install this Linux distribution?

A)Motorola 68040
B)Intel Xeon
C)SPARC
D)Pentium

Answer 1

C

Question 2

If you are designing a CPU on which you want to memory that can be accessed at the internal clock speed of the CPU, which type of memory are you concerned with?

A)L4 RAM
B)L4 cache
C)L1 cache
D)L1 RAM

Answer 2

C

Question 3

A bus is the chip that performs the actual computational and logic work.

Answer 3

False

Question 4

You are building a new PC for yourself. You want your computer to have a quad-core processor made by AMD. Which processor family should you choose?

A)K6-III
B)Duron
C)Phenom II
D)Athlon X2

Question 5

The address bus almost always runs faster than the external clock speed of the CPU.

Question 6

A RISC CPU performs more complex instructions and use a uniform number of clock cycles for each instruction.

Question 7

CPUs that run faster generally require more energy and generate more heat.

Question 8

Which feature of RISC CPUs allows the processor to operate on one instruction at the same time it is fetching one or more subsequent instructions?

A)caching
B)CPU scheduling
C)coprocessing
D)pipelining

Question 9

If your address bus is 16-bits wide, approximately how much memory can your computer address?

A)64K bytes
B)1024K bytes
C)4G bits
D)64K bits

Question 10

The Intel Itanium processor is a CISC-based processor that uses a 128-bit architecture.

Question 11

You have found an old dusty computer in your basement that you can identify as an original IBM PC. You ask your friend if he knows what CPU was used in these computers. Which of the following represents a correct response to your question?

A)8088
B)Pentium
C)80286
D)Itanium

Question 12

You are troubleshooting a computer that is in the design phase. The problem you see is that the CPU is not receiving information about the status of resources and devices connected to the computer. The CPU is also not receiving IRQs. What component of the computer do you suspect could be the problem?

A)CPU cache
B)data bus
C)control bus
D)address bus

Question 13

Which CPU vendor developed a processor called Athlon?

A)HP
B)AMD
C)Motorola
D)Intel

Question 14

Approximately how much data could a CPU with an external clock speed of 2 GHz and a 32-bit data bus transfer per second?

A)4 Gigabits
B)8 Gigabits
C)4 Gigabytes
D)8 Gigabytes

Question 15

Which part of the CPU is the "director of operations?"

A)CU
B)ALU
C)register
D)system bus

Question 16

Which hardware component predicts what data will be needed and makes that data available to the CPU's internal memory?

A)cache controller
B)data bus
C)address bus
D)RAM controller

Question 17

A CPU that has two or more sections that read and execute instructions is referred to as which of the following?

A)multiprocessor CPU
B)single-CPU system
C)multicore processor
D)multibus processor

Question 18

Which of the following is true about RISC CPU hardware?

A)it is less complicated and can perform pipelining more effectively
B)it is more complicated and must run at slower clock speeds
C)instructions take a widely varying number of clock cycles
D)all current CPUs are based on it

Question 19

You are creating specifications for a new high-end workstation. Which CPU should you choose if you want at least six CPU cores?

A)Itanium
B)Intel Core i7
C)Athlon II
D)Atom

Question 20

Which of the following is best described as a technology that enables a single processor to appear as two processors to the OS and allows multiple threads to run simultaneously?

A)EPIC
B)hyper-threading
C)RISC
D)super-threading

Question 21

Which CPU, developed originally by DEC, had 64-bit data and address buses, and was the first chip to reach 1 GHz?

A)SPARC
B)Alpha
C)PowerPC
D)Athlon

Question 22

Describe the SPARC architecture.

Question 23

In which part of a computer does CPU scheduling occur?

A)control bus
B)operating system
C)microcode
D)interrupts

Question 24

You want your server to be able to access up to 32 GB of RAM. What should you be looking for?

A)32-bit data bus
B)128-bit system bus
C)64-bit address bus
D)48-bit control bus

Question 25

If two parts of the same process can be executed simultaneously by the CPU, what feature is being used?

A)multithreading
B)multiprocessing
C)multitasking
D)multischeduling

Question 26

Describe the difference between a RISC and CISC CPU.

Question 27

What is the purpose of a register in a CPU? Describe three types of registers.

Question 28

Which AMD processor line has 8 cores and runs up to 4.7 GHz?

A)Duron
B)Phenom II
C)Opteron 6000
D)FX-8320

Question 29

What is microarchitecture?

Question 30

While troubleshooting a computer hardware problem, you find that the processor is not being informed when a device has data ready to be read or written. What is the likely problem?

A)ALU
B)hyper-threading
C)IRQs
D)CPU core

Question 31

What does the control bus do?

Question 32

What is the purpose of assembly?

Question 33

Describe what is meant by a computer's system architecture.

Question 34

Which type of cache is found as part of more advanced CPUs, is shared among the CPU cores and typically comes in sizes of 8 and 16 MB?

A)Level 4
B)Level 2
C)Level 1
D)Level 3

Question 35

Which type of CPU was designed jointly by Motorola, Apple, and IBM?

A)SPARC
B)Alpha
C)PowerPC
D)Athlon

Question 36

What is the purpose of a compiler?

Question 37

What is a name given to the process of a CPU switching between applications very quickly?

A)time slicing
B)multithreading
C)pipelining
D)floating point operations

Question 38

What is the difference between L1 cache and L2 cache?

Question 39

List the three types of bus that you will find in every computer design.

Question 40

If you are concerned about how many bytes per second you computer can transfer from main memory to the CPU, what part of the computer are you concerned with?

A)data bus
B)Level I cache
C)registers
D)address width