Deck 5: Processor and Memory Fundamentals

Question 1

Control Unit acts as the central nervous system of the computer.

Answer 1

True

Question 2

What does MBR stand for?

A)main buffer register
B)memory buffer routine
C)main buffer routine
D)memory buffer register

Answer 2

memory buffer register

Question 3

What does PC stand for?

A)program changer
B)program counter
C)performance counter
D)performance changer

Answer 3

program counter

Question 4

Which of the following holds the last instruction fetched?

A)pc
B)mar
C)mbr
D)ir

Question 5

The portion of the processor which contains the hardware required to fetch the operations is___________

A)datapath
B)processor
C)control
D)output unit

Question 6

Causing the CPU to step through a series of micro operations is called___________    

A)execution
B)runtime
C)sequencing
D)pipelining

Question 7

The functions of execution and sequencing are performed by using___________    

A)input signals
B)output signals
C)control signals
D)cpu

Question 8

What does D in the D-flip flop stand for?

A)digital
B)direct
C)delay
D)durable

Question 9

What is the high speed memory between the main memory and the CPU called?

A)register memory
B)cache memory
C)storage memory
D)virtual memory

Question 10

Cache Memory is implemented using the DRAM chips.

Question 11

Whenever the data is found in the cache memory it is called as___________    

A)hit
B)miss
C)found
D)error

Question 12

LRU stands for___________        

A)low rate usage
B)least rate usage
C)least recently used
D)low required usage

Question 13

When the data at a location in cache is different from the data located in the main memory, the cache is called___________  

A)unique
B)inconsistent
C)variable
D)fault

Question 14

Which of the following is not a write policy to avoid Cache Coherence?

A)write through
B)write within
C)write back
D)buffered write

Question 15

Which of the following is an efficient method of cache updating?

A)snoopy writes
B)write through
C)write within
D)buffered write

Question 16

In___________mapping, the data can be mapped anywhere in the Cache Memory.

A)associative
B)direct
C)set associative
D)indirect

Question 17

The number of sign bits in a 32-bit IEEE format is          

A)1
B)11
C)9
D)23

Question 18

The transfer between CPU and Cache is

A)block transfer
B)word transfer
C)set transfer
D)associative transfer

Question 19

Computer has a built-in system clock that emits millions of regularly spaced electric pulses per___________called clock cycles.

A)second
B)millisecond
C)microsecond
D)minute

Question 20

It takes one clock cycle to perform a basic operation.

Question 21

The operation that does not involves clock cycles is___________    

A)installation of a device
B)execute
C)fetch
D)decode

Question 22

The number of clock cycles per second is referred as___________  

A)clock speed
B)clock frequency
C)clock rate
D)clock timing

Question 23

CISC stands for___________

A)complex information sensed cpu
B)complex instruction set computer
C)complex intelligence sensed cpu
D)complex instruction set cpu

Question 24

Which of the following processor has a fixed length of instructions?

A)cisc
B)risc
C)epic
D)multi-core