Deck 3: Boolean Algebra and Logic Circuits

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Question
A variable on its own or in its complemented form is known as a______________    

A)product term
B)literal
C)sum term
D)word
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Question
Maxterm is the sum of______________    of the corresponding Minterm with its literal complemented.

A)terms
B)words
C)numbers
D)nibble
Question
Canonical form is a unique way of representing

A)sop
B)minterm
C)boolean expressions
D)pos
Question
There are______________  Minterms for 3 variables (a, b, c).

A)0
B)2
C)8
D)1
Question
____________expressions can be implemented using either (1) 2-level AND-OR logic circuits or (2) 2-level NAND logic circuits.

A)pos
B)literals
C)sop
D)pos.
Question
There are____________cells in a 4-variable K-map.

A)12
B)16
C)18
D)8
Question
The K-map based Boolean reduction is based on the following Unifying Theorem: A + A' = 1.

A)impact
B)non impact
C)force
D)complementarity
Question
Each product term of a group, w'.x.y' and w.y, represents the______________       in that group.

A)input
B)pos
C)sum-of-minterms
D)sum of maxterms
Question
The prime implicant which has at least one element that is not present in any other implicant is known as

A)essential prime implicant
B)implicant
C)complement
D)prime complement
Question
Product-of-Sums expressions can be implemented using______________      

A)2-level or-and logic circuits
B)2-level nor logic circuits
C)2-level xor logic circuits
D)both 2-level or-and and nor logic circuits
Question
Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given______________      

A)function
B)value
C)set
D)word
Question
Don't care conditions can be used for simplifying Boolean expressions in______________      

A)registers
B)terms
C)k-maps
D)latches
Question
It should be kept in mind that don't care terms should be used along with the terms that are present in

A)minterms
B)expressions
C)k-map
D)latches
Question
Using the transformation method you can realize any POS realization of OR-AND with only.

A)xor
B)nand
C)and
D)nor
Question
There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and______________ operations.

A)x-nor
B)xor
C)nor
D)nand
Question
In case of XOR/XNOR simplification we have to look for the following______________              

A)diagonal adjacencies
B)offset adjacencies
C)straight adjacencies
D)both diagonal and offset adjencies
Question
Entries known as______________mapping.

A)diagonal
B)straight
C)k
D)boolean
Question
The code where all successive numbers differ from their preceding number by single bit is______________    

A)alphanumeric code
B)bcd
C)excess 3
D)gray
Question
How many AND gates are required to realize Y = CD + EF + G?

A)4
B)5
C)3
D)2
Question
The NOR gate output will be high if the two inputs are______________    

A)00
B)01
C)10
D)11
Question
A full adder logic circuit will have______________    

A)two inputs and one output
B)three inputs and three outputs
C)two inputs and two outputs
D)three inputs and two outputs
Question
How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB?

A)3, 2
B)4, 2
C)1, 1
D)2, 3
Question
Which of following are known as universal gates?

A)nand & nor
B)and & or
C)xor & or
D)ex-nor & xor
Question
Which of the circuits in figure (a to d) is the sum-of- products implementation of figure (e)?

A)x=ab'+a'b
B)x=(ab)'+ab
C)x=(ab)'+a'b'
D)x=a'b'+ab
Question
The device shown here is most likely a______________

A)a
B)b
C)c
D)d
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Deck 3: Boolean Algebra and Logic Circuits
1
A variable on its own or in its complemented form is known as a______________    

A)product term
B)literal
C)sum term
D)word
literal
2
Maxterm is the sum of______________    of the corresponding Minterm with its literal complemented.

A)terms
B)words
C)numbers
D)nibble
terms
3
Canonical form is a unique way of representing

A)sop
B)minterm
C)boolean expressions
D)pos
boolean expressions
4
There are______________  Minterms for 3 variables (a, b, c).

A)0
B)2
C)8
D)1
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5
____________expressions can be implemented using either (1) 2-level AND-OR logic circuits or (2) 2-level NAND logic circuits.

A)pos
B)literals
C)sop
D)pos.
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6
There are____________cells in a 4-variable K-map.

A)12
B)16
C)18
D)8
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7
The K-map based Boolean reduction is based on the following Unifying Theorem: A + A' = 1.

A)impact
B)non impact
C)force
D)complementarity
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8
Each product term of a group, w'.x.y' and w.y, represents the______________       in that group.

A)input
B)pos
C)sum-of-minterms
D)sum of maxterms
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9
The prime implicant which has at least one element that is not present in any other implicant is known as

A)essential prime implicant
B)implicant
C)complement
D)prime complement
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10
Product-of-Sums expressions can be implemented using______________      

A)2-level or-and logic circuits
B)2-level nor logic circuits
C)2-level xor logic circuits
D)both 2-level or-and and nor logic circuits
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11
Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given______________      

A)function
B)value
C)set
D)word
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12
Don't care conditions can be used for simplifying Boolean expressions in______________      

A)registers
B)terms
C)k-maps
D)latches
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13
It should be kept in mind that don't care terms should be used along with the terms that are present in

A)minterms
B)expressions
C)k-map
D)latches
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14
Using the transformation method you can realize any POS realization of OR-AND with only.

A)xor
B)nand
C)and
D)nor
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k this deck
15
There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and______________ operations.

A)x-nor
B)xor
C)nor
D)nand
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16
In case of XOR/XNOR simplification we have to look for the following______________              

A)diagonal adjacencies
B)offset adjacencies
C)straight adjacencies
D)both diagonal and offset adjencies
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17
Entries known as______________mapping.

A)diagonal
B)straight
C)k
D)boolean
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18
The code where all successive numbers differ from their preceding number by single bit is______________    

A)alphanumeric code
B)bcd
C)excess 3
D)gray
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19
How many AND gates are required to realize Y = CD + EF + G?

A)4
B)5
C)3
D)2
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k this deck
20
The NOR gate output will be high if the two inputs are______________    

A)00
B)01
C)10
D)11
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21
A full adder logic circuit will have______________    

A)two inputs and one output
B)three inputs and three outputs
C)two inputs and two outputs
D)three inputs and two outputs
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22
How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB?

A)3, 2
B)4, 2
C)1, 1
D)2, 3
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23
Which of following are known as universal gates?

A)nand & nor
B)and & or
C)xor & or
D)ex-nor & xor
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24
Which of the circuits in figure (a to d) is the sum-of- products implementation of figure (e)?

A)x=ab'+a'b
B)x=(ab)'+ab
C)x=(ab)'+a'b'
D)x=a'b'+ab
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25
The device shown here is most likely a______________

A)a
B)b
C)c
D)d
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